``` // Pins (CONFIRMED by schematic) #define GATE1 8 // → MOC3023M (OK1) → Triac U1 (FA) #define GATE2 9 // → MOC3023M (OK2) → Triac U8 (FB) #define GATE3 10 // → MOC3023M (OK3) → Triac U9 (FC) #define ZC1 2 // ← PC817 (OP1) phase FA #define ZC2 3 // ← PC817 (OP2) phase FB #define ZC3 4 // ← PC817 (OP3) phase FC #define POT A0 // Potentiometer input volatile bool ZC_flag[3] = {0, 0, 0}; volatile unsigned long ZC_time[3]; unsigned long alpha = 0; bool fired[3] = {0, 0, 0}; void handleZC(int idx) { ZC_flag[idx] = true; ZC_time[idx] = micros(); fired[idx] = false; } void setup() { // Triac control pins pinMode(GATE1, OUTPUT); pinMode(GATE2, OUTPUT); pinMode(GATE3, OUTPUT); digitalWrite(GATE1, LOW); digitalWrite(GATE2, LOW); digitalWrite(GATE3, LOW); // Zero-crossing inputs (with pullups) pinMode(ZC1, INPUT_PULLUP); pinMode(ZC2, INPUT_PULLUP); pinMode(ZC3, INPUT_PULLUP); // Interrupts for phases FA & FB (FALLING edge) attachInterrupt(digitalPinToInterrupt(ZC1), []{ handleZC(0); }, FALLING); attachInterrupt(digitalPinToInterrupt(ZC2), []{ handleZC(1); }, FALLING); // Pin-change interrupt for phase FC PCICR |= (1 << PCIE2); // Enable PCINT2 group PCMSK2 |= (1 << PCINT20); // Enable for D4 (PCINT20) } // Interrupt for phase FC ISR(PCINT2_vect) { static uint8_t lastState = HIGH; uint8_t currentState = digitalRead(ZC3); if (lastState == HIGH && currentState == LOW) { handleZC(2); // Falling edge detected } lastState = currentState; } void loop() { unsigned long now = micros(); // Process all three phases for (int i = 0; i < 3; i++) { if (ZC_flag[i] && !fired[i] && (now - ZC_time[i] >= alpha)) { digitalWrite(GATE1 + i, HIGH); delayMicroseconds(200); // 200µs trigger pulse digitalWrite(GATE1 + i, LOW); fired[i] = true; } } // Update alpha from pot every 100ms static unsigned long lastUpdate; if (millis() - lastUpdate > 100) { int potValue = analogRead(POT); alpha = (1023 - potValue) * 10; // 0-10230 µs alpha = min(alpha, 9500); // Cap at 95% of half-cycle lastUpdate = millis(); } }```